Carbon Nano Tube Field Effect Transistor Based 4-Bit Full Adder Cell
Cheena Jain *
Department of Electronics and Communication Engineering, Guru Nanak Dev Engineering College, Ludhiana, Punjab, India.
Sandeep Singh Gill
Department of Electronics and Communication Engineering, Guru Nanak Dev Engineering College, Ludhiana, Punjab, India.
*Author to whom correspondence should be addressed.
Abstract
Addition is considered as the basic operation for every digital circuit or system, digital signal processing and control system. The fast and accurate operation of any digital system is mainly influenced by the performance of its resident adders. In this paper a 4-bit full adder is proposed using carbon nanotube field effect transistor which is energy efficient, operates at high speed and low voltage and consumes ultra low power. The full adder cell is designed using 48 transistors. The proposed technique has been examined at voltage 0.8V. The simulation results taken on HSPICE show that this module has given more than 42% in power savings over conventional Complementary Metal Oxide Semiconductor (CMOS) adder and 56% is faster.
Keywords: Basic gates, full adder, carbon nanotube field effect transistor, carbon nanotube