Hardware Efficient Scheme for Indoor Environment Using Grid Mapping
M. C. Chinnaiah *
Department of ECE, BVRIT, Narsapur, Telangana, India
T. Satya Savithri
Department of ECE, JNTUCE, JNTU Hyderabad, Telangana, India
P. Rajesh Kumar
Department of ECE, PVPSIT, Vijayawada, Andhra Pradesh, India
*Author to whom correspondence should be addressed.
Abstract
This paper addresses the mobile robot navigation using grid mapping. The proposal is to introduce dedicated Hardware scheme for robot navigation and it is deployed on Spartan 3E FPGA. The environment is divided into the grids, where landmarks are considered as grid points. Landmarks are RFID tags, among RFID system the reader is placed on the robot and interfaced with FPGA using UART protocol. The proposed path planning is also developed with obstacle avoidance mechanism to overcome the obstacles in robust environment. The robot navigation efficacy improves with the landmarks and hardware scheme. The hardware scheme is developed with NI lab view. Simulation and experimental results are furnished for proposed navigation algorithm in our laboratory.
Aim: Navigation of FPGA based Autonomous robot efficiently towards the target using grid mapping technique.
Study Design: The study of path planning methods. Among that efficient path planning is proposed with landmark by using grid mapping. Developed the hardware scheme for proposed algorithm. Place and Duration of Study: Padamasri Dr B V Raju Institute of Technology, Narasapur, Medak (Dist), Telangana, 502313. Duration of study in 2014-15.
Methodology: Hardware scheme for autonomous robot navigation.
Results: Simulation results of proposed algorithm and experimental results with snapshots.
Conclusion: Navigation of Autonomous fpga based robot with a hardware scheme by parallel processing and using grid mapping methods.
Keywords: Path planning, hardware, landmark, obstacle avoidance, FPGA